A zero-voltage-switching (ZVS) three-phase PWM inverter which uses a newly proposed Parallel-Resonant DC-Link (PRDCL) circuit is further examined in this paper. The proposed PRDCL circuit is aimed at both providing zero-dc-link voltage periods for PWM inverter switchings and imposing minimum dc bus voltage stress to PWM inverters. A simple circuit control scheme and the design formulas are offered. To confirm the circuit theoretical analyses and results, a 50-watt ZVS single-phase PWM inverter experimental prototype using the proposed PRDCL circuit was fabricated and tested. The test results have proved the proposed circuit and concept. The paper concludes with the power device selections and device stress evaluations as well as a detailed comparison of the proposed PRDCL ZVS inverter system with conventional voltage source PWM inverters.