VLSI implementation issues of TURBO decoder design for wireless applications

Zhongfeng Wang, Hiroshi Suzuki, Keshab K Parhi

Research output: Contribution to journalConference articlepeer-review

71 Scopus citations


Finite precision effects on the performance of TURBO decoders have been analyzed and the optimal word lengths of variables have been determined considering tradeoffs between the performance and the hardware cost. It is shown that the performance degradation from the infinite precision is negligible if 4 bits are used for received bits and 6 bits for the extrinsic information. The state metrics normalization method suitable for TURBO decoders is also discussed. This method requires small amount of hardware and its speed does not depend on the number of states. Furthermore, we propose novel power-down techniques, which can achieve very high power-down efficiency without performance or latency degradation at the expense of negligible hardware overhead.

Original languageEnglish (US)
Pages (from-to)503-512
Number of pages10
JournalIEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation
StatePublished - Dec 1 1999
Event1999 IEEE Workshop on SiGNAL Processing Systems (SiPS 99): 'Design and Implementation' - Taipei, Taiwan
Duration: Oct 20 1999Oct 22 1999


Dive into the research topics of 'VLSI implementation issues of TURBO decoder design for wireless applications'. Together they form a unique fingerprint.

Cite this