VLSI design of digit-serial FPGA architecture

Research output: Contribution to journalArticlepeer-review


This paper presents a novel application-specific field-programmable gate array (FPGA) architecture that satisfies efficient implementation of digit-serial DSP architectures on a digit wide basis. Digit-serial DSP designs have been an effective implementation method for FPGAs. To efficiently realize a digit-serial DSP design on FPGAs, one must create an FPGA architecture optimized for those types of systems. We examine the various circuits used in digit-serial DSP designs to extract their key features that should be reflected in the new FPGA architecture. We explain the design methodology, layout and implementation of the new digit-serial FPGA architecture, Digit-serial DSP designs using the digit-serial FPGA (DS-FPGA) are compared to those implemented on Xilinx FPGAs. We have estimated that the DS-FPGA are about 2.5-3 times more efficient in area and faster than the equivalent digit-serial DSP architectures implemented using Xilinx FPGAs.

Original languageEnglish (US)
Pages (from-to)17-52
Number of pages36
JournalJournal of Circuits, Systems and Computers
Issue number1
StatePublished - Feb 2004

Bibliographical note

Funding Information:
The authors would like to thank Keshab Parhi for valuable conversations. This research was supported by Defense Advanced Research Project Agency under contract number DA/DABT63-96-C-0050.


  • Architecture
  • DSP
  • Digit-serial
  • FPGA
  • VLSI


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