Skip to main navigation
Skip to search
Skip to main content
Experts@Minnesota Home
Home
Profiles
Research units
University Assets
Projects and Grants
Research output
Press/Media
Datasets
Activities
Fellowships, Honors, and Prizes
Search by expertise, name or affiliation
VLSI architectures for the restricted boltzmann machine
Bo Yuan,
Keshab K. Parhi
Electrical and Computer Engineering
Research output
:
Contribution to journal
›
Article
›
peer-review
4
Scopus citations
Overview
Fingerprint
Fingerprint
Dive into the research topics of 'VLSI architectures for the restricted boltzmann machine'. Together they form a unique fingerprint.
Sort by
Weight
Alphabetically
Keyphrases
VLSI Architecture
100%
Neural Network System
100%
Restricted Boltzmann Machine
100%
Training Time
50%
Training Intensity
50%
Speech Recognition
25%
Energy Efficiency
25%
Computer Vision
25%
Latency
25%
Optimization Approach
25%
On-the-fly Computation
25%
VLSI Design
25%
Speed Efficiency
25%
Design Example
25%
Storage Requirement
25%
GPU-based
25%
Software Implementation
25%
CPU-GPU
25%
Hardware Level
25%
Specialized Hardware
25%
MNIST Handwritten Digit Recognition
25%
Efficient Hardware Architecture
25%
Machine Design
25%
Recognition Dataset
25%
General Processing Unit
25%
Flat Design
25%
Hardware Accelerator
25%
Computer Science
Boltzmann Machine
100%
Very large-scale integration (VLSI) architecture
100%
Neural Network
100%
Graphics Processing Unit
50%
Speech Recognition
25%
Software Implementation
25%
Hardware Architecture
25%
Hardware Accelerator
25%
Hardware Level
25%
handwritten digit recognition
25%
Energy Efficiency
25%
Processing Unit
25%
Storage Requirement
25%
Computer Vision
25%
Engineering
Boltzmann Equation
100%
Neural Network System
100%
Graphics Processing Unit
50%
Energy Conservation
25%
Computervision
25%
Storage Requirement
25%
Processing Unit
25%
Optimization Approach
25%
Machine Design
25%
Energy Efficiency
25%
Hardware Accelerator
25%