VLSI architectures for lattice structure based orthonormal discrete wavelet transforms

Tracy C. Denk, Keshab K. Parhi

Research output: Contribution to journalArticlepeer-review

49 Scopus citations

Abstract

This brief presents efficient single-rate architectures for the one-dimensional orthonormal discrete wavelet transform (DWT). This brief makes two contributions. First, we show that architectures that are based on the quadrature mirror filter (QMF) lattice structure require approximately half the number of multipliers and adders than corresponding direct-form structures. Second, we present techniques for mapping the 1-D orthonormal DWT to folded and digit-serial architectures which are based on the QMF lattice structure. For folded architectures, we discuss two techniques for mapping the QMF lattice structure to hardware. For digit-serial architectures, we show that any two-channel subband system can be implemented using digit-serial processing techniques by utilizing the polyphase decomposition. Using this result, we describe an orthonormal DWT architecture which uses the QMF lattice structure and digit-serial processing techniques. The proposed folded and digit-serial QMF lattice structures are attractive choices for implementations of the orthonormal DWT which require low area and low power dissipation.

Original languageEnglish (US)
Pages (from-to)129-132
Number of pages4
JournalIEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
Volume44
Issue number2
DOIs
StatePublished - 1997

Bibliographical note

Funding Information:
Manuscript received May 2, 1995; revised November 16, 1995. This work was supported in part by the Advanced Research Projects Agency and the Solid State Electronics Directorate, Wright-Patterson AFB under Contract AF/F33615-93-C-1309, and an Air Force Laboratory Graduate Fellowship. This paper was recommended by Associate Editor W. Burleson.

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