VLSI architecture design for reconfigurable block size motion estimation

Peng Li, Hua Tang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a VLSI architecture to support full-search motion estimation with reconfigurable block size, which is well needed in video based surveillance applications. Experiment results show that the proposed architecture achieves the flexibility of adjustable block size at the expense of only 5% hardware overhead compared to the traditional design.

Original languageEnglish (US)
Title of host publicationICCE 2010 - 2010 Digest of Technical Papers International Conference on Consumer Electronics
Pages439-440
Number of pages2
DOIs
StatePublished - Apr 1 2010
Event2010 International Conference on Consumer Electronics, ICCE 2010 - Las Vegas, NV, United States
Duration: Jan 11 2010Jan 13 2010

Publication series

NameICCE 2010 - 2010 Digest of Technical Papers International Conference on Consumer Electronics

Other

Other2010 International Conference on Consumer Electronics, ICCE 2010
CountryUnited States
CityLas Vegas, NV
Period1/11/101/13/10

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  • Cite this

    Li, P., & Tang, H. (2010). VLSI architecture design for reconfigurable block size motion estimation. In ICCE 2010 - 2010 Digest of Technical Papers International Conference on Consumer Electronics (pp. 439-440). [5418945] (ICCE 2010 - 2010 Digest of Technical Papers International Conference on Consumer Electronics). https://doi.org/10.1109/ICCE.2010.5418945