TY - GEN
T1 - Variation-aware supply voltage assignment for minimizing circuit degradation and leakage
AU - Chen, Xiaoming
AU - Wang, Yu
AU - Cao, Yu
AU - Ma, Yuchun
AU - Yang, Huazhong
PY - 2009
Y1 - 2009
N2 - As technology scales, Negative Bias Temperature Instability (NBTI) has become a major reliability concern for circuit designers. And the growing process variations can no longer be ignored. Meanwhile, reducing leakage power remains to be one of the design goals. In this paper, we first present a platform for NBTI-aware statistical timing and leakage power analysis. A variation-aware supply voltage assignment (SVA) technique combining dual V dd assignment and dynamic Vdd scaling techniques is proposed to minimize NBTI degradation and leakage. Based on the statistical platform, we analyze the impact of Vth variations on NBTI degradation and leakage. The experimental results show that our SVA technique can mitigate on average 52.98% of NBTI degradation with little or without leakage power increase; furthermore, it can reduce on average 32.46% more leakage power compared with the pure single Vdd scaling technique. Compared with scheduled voltage scaling technique [9], our dynamic scaling technique is more effective because the circuit delay will exactly meet the specification at each dynamically decided time node during circuit operation.
AB - As technology scales, Negative Bias Temperature Instability (NBTI) has become a major reliability concern for circuit designers. And the growing process variations can no longer be ignored. Meanwhile, reducing leakage power remains to be one of the design goals. In this paper, we first present a platform for NBTI-aware statistical timing and leakage power analysis. A variation-aware supply voltage assignment (SVA) technique combining dual V dd assignment and dynamic Vdd scaling techniques is proposed to minimize NBTI degradation and leakage. Based on the statistical platform, we analyze the impact of Vth variations on NBTI degradation and leakage. The experimental results show that our SVA technique can mitigate on average 52.98% of NBTI degradation with little or without leakage power increase; furthermore, it can reduce on average 32.46% more leakage power compared with the pure single Vdd scaling technique. Compared with scheduled voltage scaling technique [9], our dynamic scaling technique is more effective because the circuit delay will exactly meet the specification at each dynamically decided time node during circuit operation.
KW - Dual V
KW - Dynamic V scaling
KW - Leakage power
KW - Negative Bias Temperature Instability (NBTI)
UR - http://www.scopus.com/inward/record.url?scp=70449728136&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=70449728136&partnerID=8YFLogxK
U2 - 10.1145/1594233.1594244
DO - 10.1145/1594233.1594244
M3 - Conference contribution
AN - SCOPUS:70449728136
SN - 9781605586847
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
SP - 39
EP - 44
BT - ISLPED'09 - Proceedings of the 2009 ACM/IEEE International Symposium on Low Power Electronics and Design
T2 - 2009 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'09
Y2 - 19 August 2009 through 21 August 2009
ER -