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Variable-Sized Blocks for Locality-Aware SpMV
Naveen Namashivavam
, Sanyam Mehta
, Pen Chung Yew
Computer Science and Engineering
Research output
:
Chapter in Book/Report/Conference proceeding
›
Conference contribution
11
Scopus citations
Overview
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Computer Science
Multicore Processor
100%
Reference Pattern
100%
Data Type
100%
Memory Reference
100%
Temporal Locality
100%
Intel Math Kernel Library
100%
Analytical Model
100%
Keyphrases
Sparse Matrix-vector multiplication (SpMV)
100%
Locality-aware
100%
Intel Xeon Phi
40%
Network Analysis
20%
Multicore Processors
20%
Intel
20%
Reference Pattern
20%
Block-based
20%
Temporal Locality
20%
Sparse Matrices
20%
Memory References
20%
Analytical Model
20%
Block Size
20%
Sparse Data
20%
Blocking Scheme
20%
Data Movement
20%
Skylake
20%
Optimization Options
20%
Math Kernel Library
20%