TY - JOUR
T1 - Utilizing reverse short-channel effect for optimal subthreshold circuit design
AU - Kim, Tae Hyoung
AU - Keane, John
AU - Eom, Hanyong
AU - Kim, Chris H.
PY - 2007/7
Y1 - 2007/7
N2 - The impact of the reverse short-channel effect (RSCE) on device current is stronger in the subthreshold region due to reduced drain-induced barrier lowering (DIBL) and the exponential dependency of current on threshold voltage. This paper describes a device-size optimization method for subthreshold circuits utilizing RSCE to achieve high drive current, low device capacitance, less sensitivity to random dopant fluctuations, better subthreshold swing, and improved energy dissipation. Simulation results using ISCAS benchmark circuits show that the critical path delay, power consumption, and energy consumption can be improved by up to 10.4%, 34.4%, and 41.2%, respectively.
AB - The impact of the reverse short-channel effect (RSCE) on device current is stronger in the subthreshold region due to reduced drain-induced barrier lowering (DIBL) and the exponential dependency of current on threshold voltage. This paper describes a device-size optimization method for subthreshold circuits utilizing RSCE to achieve high drive current, low device capacitance, less sensitivity to random dopant fluctuations, better subthreshold swing, and improved energy dissipation. Simulation results using ISCAS benchmark circuits show that the critical path delay, power consumption, and energy consumption can be improved by up to 10.4%, 34.4%, and 41.2%, respectively.
KW - Circuit optimization
KW - Process variation
KW - Reverse short-channel effect (RSCE)
KW - Subthreshold operation
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U2 - 10.1109/TVLSI.2007.899239
DO - 10.1109/TVLSI.2007.899239
M3 - Article
AN - SCOPUS:34347237842
VL - 15
SP - 821
EP - 828
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
SN - 1063-8210
IS - 7
ER -
