Using stochastic computing to reduce the hardware requirements for a restricted boltzmann machine classifier

Bingzhe Li, M. Hassan Najafi, David J Lilja

Research output: Chapter in Book/Report/Conference proceedingConference contribution

39 Scopus citations

Abstract

Artificial neural networks are powerful computational sys- tems with interconnected neurons. Generally, these net- works have a very large number of computation nodes which forces the designer to use software-based implementations. However, the software based implementations are offline and not suitable for portable or real-time applications. Experi- ments show that compared with the software based imple- mentations, FPGA-based systems can greatly speed up the computation time, making them suitable for real-time situa- tions and portable applications. However, the FPGA imple- mentation of neural networks with a large number of nodes is still a challenging task. In this paper, we exploit stochastic bit streams in the Re- stricted Boltzmann Machine (RBM) to implement the clas- sification of the RBM handwritten digit recognition applica- tion completely on an FPGA. We use finite state machine- based (FSM) stochastic circuits to implement the required sigmoid function and use the novel stochastic computing approach to perform all large matrix multiplications. Ex- perimental results show that the proposed stochastic archi- tecture has much more potential for tolerating faults while requiring much less hardware compared to the currently un-implementable deterministic binary approach when the RBM consists of a large number of neurons. Exploiting the features of stochastic circuits, our implementation achieves much better performance than a software-based approach.

Original languageEnglish (US)
Title of host publicationFPGA 2016 - Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
PublisherAssociation for Computing Machinery, Inc
Pages36-41
Number of pages6
ISBN (Electronic)9781450338561
DOIs
StatePublished - Feb 21 2016
Event2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2016 - Monterey, United States
Duration: Feb 21 2016Feb 23 2016

Publication series

NameFPGA 2016 - Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

Conference

Conference2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2016
CountryUnited States
CityMonterey
Period2/21/162/23/16

Keywords

  • FPGA-based implementation
  • Neural network
  • Restricted Boltzman machine
  • Stochastic computing

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