TY - GEN
T1 - Using stochastic computing to reduce the hardware requirements for a restricted boltzmann machine classifier
AU - Li, Bingzhe
AU - Najafi, M. Hassan
AU - Lilja, David J
N1 - Publisher Copyright:
© 2016 ACM.
Copyright:
Copyright 2016 Elsevier B.V., All rights reserved.
PY - 2016/2/21
Y1 - 2016/2/21
N2 - Artificial neural networks are powerful computational sys- tems with interconnected neurons. Generally, these net- works have a very large number of computation nodes which forces the designer to use software-based implementations. However, the software based implementations are offline and not suitable for portable or real-time applications. Experi- ments show that compared with the software based imple- mentations, FPGA-based systems can greatly speed up the computation time, making them suitable for real-time situa- tions and portable applications. However, the FPGA imple- mentation of neural networks with a large number of nodes is still a challenging task. In this paper, we exploit stochastic bit streams in the Re- stricted Boltzmann Machine (RBM) to implement the clas- sification of the RBM handwritten digit recognition applica- tion completely on an FPGA. We use finite state machine- based (FSM) stochastic circuits to implement the required sigmoid function and use the novel stochastic computing approach to perform all large matrix multiplications. Ex- perimental results show that the proposed stochastic archi- tecture has much more potential for tolerating faults while requiring much less hardware compared to the currently un-implementable deterministic binary approach when the RBM consists of a large number of neurons. Exploiting the features of stochastic circuits, our implementation achieves much better performance than a software-based approach.
AB - Artificial neural networks are powerful computational sys- tems with interconnected neurons. Generally, these net- works have a very large number of computation nodes which forces the designer to use software-based implementations. However, the software based implementations are offline and not suitable for portable or real-time applications. Experi- ments show that compared with the software based imple- mentations, FPGA-based systems can greatly speed up the computation time, making them suitable for real-time situa- tions and portable applications. However, the FPGA imple- mentation of neural networks with a large number of nodes is still a challenging task. In this paper, we exploit stochastic bit streams in the Re- stricted Boltzmann Machine (RBM) to implement the clas- sification of the RBM handwritten digit recognition applica- tion completely on an FPGA. We use finite state machine- based (FSM) stochastic circuits to implement the required sigmoid function and use the novel stochastic computing approach to perform all large matrix multiplications. Ex- perimental results show that the proposed stochastic archi- tecture has much more potential for tolerating faults while requiring much less hardware compared to the currently un-implementable deterministic binary approach when the RBM consists of a large number of neurons. Exploiting the features of stochastic circuits, our implementation achieves much better performance than a software-based approach.
KW - FPGA-based implementation
KW - Neural network
KW - Restricted Boltzman machine
KW - Stochastic computing
UR - http://www.scopus.com/inward/record.url?scp=84966551258&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84966551258&partnerID=8YFLogxK
U2 - 10.1145/2847263.2847340
DO - 10.1145/2847263.2847340
M3 - Conference contribution
AN - SCOPUS:84966551258
T3 - FPGA 2016 - Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
SP - 36
EP - 41
BT - FPGA 2016 - Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
PB - Association for Computing Machinery, Inc
T2 - 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2016
Y2 - 21 February 2016 through 23 February 2016
ER -