Using an optimized queueing network model to support wafer fab design

Wallace J. Hopp, Mark L. Spearman, Sergio Chayet, Karen L. Donohue, Esma S. Gel

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

We develop an Optimized Queueing Network (OQNet) capacity planning tool for supporting the design of new and reconfigured semiconductor fabrication facilities that makes use of queueing network approximations and an optimization routine. The basic problem addressed by this tool is to minimize the facility cost required to meet specified volume and cycle time targets. Features common to semiconductor environments, such as batch processes, re-entrant flows, multiple product classes, and machine setups, are incorporated into the model. Comparisons with simulation show that the queueing and other approximations are reasonably accurate. Tests of the optimization routine demonstrate that it can find good solutions quickly.

Original languageEnglish (US)
Pages (from-to)119-130
Number of pages12
JournalIIE Transactions (Institute of Industrial Engineers)
Volume34
Issue number2
DOIs
StatePublished - 2002

Fingerprint

Dive into the research topics of 'Using an optimized queueing network model to support wafer fab design'. Together they form a unique fingerprint.

Cite this