Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology

Meghna Madhusudan; Jitesh Poojary; Arvind K Sharma; Ramprasath S; Kishor Kunal; Sachin S. Sapatnekar; Ramesh Harjani

doi:10.1109/ESSDERC59256.2023.10268572

Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology

Meghna Madhusudan, Jitesh Poojary, Arvind K Sharma, Ramprasath S, Kishor Kunal, Sachin S. Sapatnekar, Ramesh Harjani

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Scopus citations

Abstract

Analog circuits are sensitive to device variations. Random device variations are well modeled and quantified in the literature, but analog-relevant distance-dependent device variation measurements have not been reported for newer technology nodes. To reduce the impact of distance-dependent variations, layout patterns such as common-centroid are often used. However, these patterns use larger area and have higher parasitics than clustered (NonCC) patterns in FinFET technologies where unit parasitics are higher and design rules are more complex. This work measures variations on multiple dies in a 12nm FinFET technology, each with about 10,000 devices, and models the distance-dependent component. We then apply these findings to show that NonCC patterns can be used in lower-resolution DACs to meet mismatch specifications while reducing layout area.

Original language	English (US)
Title of host publication	ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference
Publisher	Editions Frontieres
Pages	69-72
Number of pages	4
ISBN (Electronic)	9798350304237
DOIs	https://doi.org/10.1109/ESSDERC59256.2023.10268572
State	Published - 2023
Event	53rd IEEE European Solid-State Device Research Conference, ESSDERC 2023 - Lisbon, Portugal Duration: Sep 11 2023 → Sep 14 2023

Publication series

Name	European Solid-State Device Research Conference
Volume	2023-September
ISSN (Print)	1930-8876

Conference

Conference	53rd IEEE European Solid-State Device Research Conference, ESSDERC 2023
Country/Territory	Portugal
City	Lisbon
Period	9/11/23 → 9/14/23

Bibliographical note

Publisher Copyright:
© 2023 IEEE.

Keywords

DACs
Device variations
FinFET
analog circuits
common-centroid
measurement
modeling

Publisher link

10.1109/ESSDERC59256.2023.10268572

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Madhusudan, M., Poojary, J., Sharma, A. K., S, R., Kunal, K., Sapatnekar, S. S., & Harjani, R. (2023). Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology. In ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference (pp. 69-72). (European Solid-State Device Research Conference; Vol. 2023-September). Editions Frontieres. https://doi.org/10.1109/ESSDERC59256.2023.10268572

Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology. / Madhusudan, Meghna; Poojary, Jitesh; Sharma, Arvind K et al.
ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference. Editions Frontieres, 2023. p. 69-72 (European Solid-State Device Research Conference; Vol. 2023-September).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Madhusudan, M, Poojary, J, Sharma, AK, S, R, Kunal, K, Sapatnekar, SS & Harjani, R 2023, Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology. in ESSDERC 2023 - IEEE 53rd European Solid-State Device Research Conference. European Solid-State Device Research Conference, vol. 2023-September, Editions Frontieres, pp. 69-72, 53rd IEEE European Solid-State Device Research Conference, ESSDERC 2023, Lisbon, Portugal, 9/11/23. https://doi.org/10.1109/ESSDERC59256.2023.10268572

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AB - Analog circuits are sensitive to device variations. Random device variations are well modeled and quantified in the literature, but analog-relevant distance-dependent device variation measurements have not been reported for newer technology nodes. To reduce the impact of distance-dependent variations, layout patterns such as common-centroid are often used. However, these patterns use larger area and have higher parasitics than clustered (NonCC) patterns in FinFET technologies where unit parasitics are higher and design rules are more complex. This work measures variations on multiple dies in a 12nm FinFET technology, each with about 10,000 devices, and models the distance-dependent component. We then apply these findings to show that NonCC patterns can be used in lower-resolution DACs to meet mismatch specifications while reducing layout area.

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Understanding Distance-Dependent Variations for Analog Circuits in a FinFET Technology

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