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Abstract
We demonstrate that the transfer characteristics of electrolyte-gated transistors (EGTs) with polythiophene semiconductor channels are a strong function of gate/electrolyte interfacial contact area, i.e., gate size. Polythiophene EGTs with gate/electrolyte areas much larger than the channel/electrolyte areas show a clear peak in the drain current vs gate voltage (I D-V G) behavior, as well as peak voltage hysteresis between the forward and reverse V G sweeps. Polythiophene EGTs with small gate/electrolyte areas, on the other hand, exhibit current plateaus in the I D-V G behavior and a gate-size-dependent hysteresis loop between turn on and off. The qualitatively different transport behaviors are attributed to the relative sizes of the gate/electrolyte and channel/electrolyte interface capacitances, which are proportional to interfacial area. These interfacial capacitances are in series with each other such that the total capacitance of the full gate/electrolyte/channel stack is dominated by the interface with the smallest capacitance or area. For EGTs with large gates, most of the applied V G is dropped at the channel/electrolyte interface, leading to very high charge accumulations, up to ∼0.3 holes per ring (hpr) in the case of polythiophene semiconductors. The large charge density results in sub-band-filling and a marked decrease in hole mobility, giving rise to the peak in I D-V G. For EGTs with small gates, hole accumulation saturates near 0.15 hpr, band-filling does not occur, and hole mobility is maintained at a fixed value, which leads to the I D plateau. Potential drops at the interfaces are confirmed by in situ potential measurements inside a gate/electrolyte/polymer semiconductor stack. Hole accumulations are measured with gate current-gate voltage (I G-V G) measurements acquired simultaneously with the I D-V G characteristics. Overall, our measurements demonstrate that remarkably different I D behavior can be obtained for polythiophene EGTs by controlling the magnitude of the gate-electrolyte interfacial capacitance.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 19309-19317 |
| Number of pages | 9 |
| Journal | ACS Applied Materials and Interfaces |
| Volume | 16 |
| Issue number | 15 |
| DOIs | |
| State | Published - Apr 17 2024 |
Bibliographical note
Publisher Copyright:© 2024 American Chemical Society.
Keywords
- electrolyte-gated transistors
- interfacial potential drop
- capacitance engineering
- organic electrochemical transistors
- hysteresis
MRSEC Support
- Primary
PubMed: MeSH publication types
- Journal Article
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Dive into the research topics of 'Tuning Gate Potential Profiles and Current–Voltage Characteristics of Polymer Electrolyte-Gated Transistors by Capacitance Engineering'. Together they form a unique fingerprint.Projects
- 2 Active
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IRG-1: Ionic Control of Materials
Leighton, C. (Leader), Birol, T. (Senior Investigator), Fernandes, R. M. (Senior Investigator), Frisbie, D. (Senior Investigator), Greven, M. (Senior Investigator), Jalan, B. (Senior Investigator), Mkhoyan, A. (Senior Investigator), Walter, J. (Senior Investigator) & Wang, X. (Senior Investigator)
9/1/20 → …
Project: Research project
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University of Minnesota Materials Research Science and Engineering Center (DMR-2011401)
Leighton, C. (PI) & Lodge, T. (CoI)
THE NATIONAL SCIENCE FOUNDATION
9/1/20 → 8/31/26
Project: Research project