Abstract
A fully-digital True Random Number Generator (TRNG) measures the frequency difference between two free-running ring oscillators, or in other words the beat frequency, to extract random frequency jitter. For generating a continuous stream of random bits with a high entropy level, the lower significant bits meeting the NIST randomness criteria are concatenated. The generation efficiency is further improved by utilizing a multi-phase structure. The proposed circuit fabricated in 65nm achieves an energy efficiency of 15.1Mb/mW at 0.8V. Experimental data collected from eight TRNG test chips passed all 15 NIST tests without the use of any feedback or tracking scheme.
Original language | English (US) |
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Title of host publication | Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781479932863 |
DOIs | |
State | Published - Nov 4 2014 |
Event | 36th Annual Custom Integrated Circuits Conference - The Showcase for Integrated Circuit Design in the Heart of Silicon Valley, CICC 2014 - San Jose, United States Duration: Sep 15 2014 → Sep 17 2014 |
Publication series
Name | Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014 |
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Other
Other | 36th Annual Custom Integrated Circuits Conference - The Showcase for Integrated Circuit Design in the Heart of Silicon Valley, CICC 2014 |
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Country/Territory | United States |
City | San Jose |
Period | 9/15/14 → 9/17/14 |
Bibliographical note
Publisher Copyright:© 2014 IEEE.