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Timing optimization of mixed static and domino logic
Min Zhao
,
Sachin S. Sapatnekar
Electrical and Computer Engineering
Research output
:
Contribution to journal
›
Conference article
›
peer-review
4
Scopus citations
Overview
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Keyphrases
Timing Optimization
100%
Domino Logic
100%
Static Logic
100%
Optimization Algorithm
33%
Time Constraints
33%
Optimization Procedure
33%
Sizing Method
33%
Noise Margin
33%
Sharing Problem
33%
Charge Sharing
33%
Transistor Level
33%
Engineering
Optimisation Procedure
100%
Sizing Procedure
100%
Node Level
100%
Noise Margin
100%