TY - JOUR
T1 - Time borrowing in high-speed functional units using skew-tolerant domino circuits
AU - Jung, Gunok
AU - Perepelitsa, Victoria
AU - Sobelman, Gerald E.
PY - 2000
Y1 - 2000
N2 - We present results on time borrowing in skew-tolerant domino logic circuits for a 32-bit adder, a 64-bit adder and a 32-bit pipelined multiplier. The adders are built using enhanced multiple output domino logic and the multiplier uses modified Booth encoding and a Wallace tree. We illustrate how the resulting soft clock edges allow advantageous time borrowing to occur in these functional units. In this way, limitations due to delay imbalances between stages are removed, allowing the circuits to operate at a higher speed.
AB - We present results on time borrowing in skew-tolerant domino logic circuits for a 32-bit adder, a 64-bit adder and a 32-bit pipelined multiplier. The adders are built using enhanced multiple output domino logic and the multiplier uses modified Booth encoding and a Wallace tree. We illustrate how the resulting soft clock edges allow advantageous time borrowing to occur in these functional units. In this way, limitations due to delay imbalances between stages are removed, allowing the circuits to operate at a higher speed.
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U2 - 10.1109/ISCAS.2000.857044
DO - 10.1109/ISCAS.2000.857044
M3 - Conference article
AN - SCOPUS:85122276764
SN - 0271-4310
VL - 5
SP - V-641-V-644
JO - Proceedings - IEEE International Symposium on Circuits and Systems
JF - Proceedings - IEEE International Symposium on Circuits and Systems
T2 - Proceedings of the IEEE 2000 International Symposium on Circuits and Systems, ISCAS 2000
Y2 - 28 May 2000 through 31 May 2000
ER -