Thermal signature: A simple yet accurate thermal index for floorplan optimization

Jaeha Kung, Inhak Han, Sachin S Sapatnekar, Youngsoo Shin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

16 Scopus citations

Abstract

A floorplanning has a potential to reduce chip temperature due to the conductive nature of heat. If floorplan optimization, which is usually based on simulated annealing, is employed to reduce temperature, its evaluation should be done extremely fast with high accuracy. A new thermal index, named thermal signature, is proposed. It approximates the temperature calculation, which is done by taking the product of Green's function and power density integrated over space. The correlation coefficient between thermal signature and temperature is shown to be quite high, more than 0.7 in many examples. A floorplanner that uses thermal signature is constructed and assessed using real design examples in 32-nm technology. It produces a floorplan whose maximum temperature is 11.4°C smaller than that of standard floorplan, on average, in reasonable amount of runtime.

Original languageEnglish (US)
Title of host publication2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011
Pages108-113
Number of pages6
StatePublished - Sep 16 2011
Event2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011 - San Diego, CA, United States
Duration: Jun 5 2011Jun 9 2011

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Other

Other2011 48th ACM/EDAC/IEEE Design Automation Conference, DAC 2011
CountryUnited States
CitySan Diego, CA
Period6/5/116/9/11

Keywords

  • Thermal analysis
  • thermal-aware floorplanning

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