Theoretical estimation of power consumption in binary adders

Robert A. Freking, Keshab K Parhi

Research output: Contribution to journalConference article

8 Scopus citations

Abstract

This paper presents a novel approach for theoretical estimation of power consumption in digital binary adders. Closed-form expressions for power consumption of four different types of binary adders - the ripple-carry adder, the Manchester adder, a multiplexor-based carry-select adder and an efficient tree-based look-ahead adder - are derived in terms of word-length and pre-computed technology-specific energy parameters. These expressions are verified to be accurate to within 1-5% by simulation using the HEAT tool.

Original languageEnglish (US)
Pages (from-to)453-457
Number of pages5
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume2
StatePublished - Jan 1 1998
EventProceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6) - Monterey, CA, USA
Duration: May 31 1998Jun 3 1998

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