The APE computer: An array processor optimized for lattice gauge theory simulations

M. Albanese, P. Bacilieri, S. Cabasino, N. Cabibbo, F. Costantini, G. Fiorentini, F. Flore, A. Fonti, A. Fucci, M. P. Lombardo, S. Galeotti, P. Giacomelli, P. Marchesini, E. Marinari, F. Marzano, A. Miotto, P. Paolucci, G. Parisi, D. Pascoli, D. PassuelloS. Petrarca, F. Rapuano, E. Remiddi, R. Rusack, G. Salina, R. Tripiccione

Research output: Contribution to journalArticle

45 Scopus citations

Abstract

The APE computer is a high performance processor designed to provide massive computational power for intrinsically parallel and homogeneous applications. APE is a linear array of processing elements and memory boards that execute in parallel in SIMD mode under the control of a CERN/SLAC 3081/E. Processing elements and memory boards are connected by a 'circular' switchnet. The hardware and software architecture of APE, as well as its implementation are discussed in this paper. Some physics results obtained in the simulation of lattice gauge theories are also presented.

Original languageEnglish (US)
Pages (from-to)345-353
Number of pages9
JournalComputer Physics Communications
Volume45
Issue number1-3
DOIs
StatePublished - Aug 1 1987

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