The APE computer: An array processor optimized for lattice gauge theory simulations

M. Albanese; P. Bacilieri; S. Cabasino; N. Cabibbo; F. Costantini; G. Fiorentini; F. Flore; A. Fonti; A. Fucci; M. P. Lombardo; S. Galeotti; P. Giacomelli; P. Marchesini; E. Marinari; F. Marzano; A. Miotto; P. Paolucci; G. Parisi; D. Pascoli; D. Passuello; S. Petrarca; F. Rapuano; E. Remiddi; R. Rusack; G. Salina; R. Tripiccione

doi:10.1016/0010-4655(87)90172-X

The APE computer: An array processor optimized for lattice gauge theory simulations

M. Albanese, P. Bacilieri, S. Cabasino, N. Cabibbo, F. Costantini, G. Fiorentini, F. Flore, A. Fonti, A. Fucci, M. P. Lombardo, S. Galeotti, P. Giacomelli, P. Marchesini, E. Marinari, F. Marzano, A. Miotto, P. Paolucci, G. Parisi, D. Pascoli, D. PassuelloS. Petrarca, F. Rapuano, E. Remiddi, R. Rusack, G. Salina, R. Tripiccione

Physics and Astronomy (Twin Cities)

Research output: Contribution to journal › Article › peer-review

46 Scopus citations

Abstract

The APE computer is a high performance processor designed to provide massive computational power for intrinsically parallel and homogeneous applications. APE is a linear array of processing elements and memory boards that execute in parallel in SIMD mode under the control of a CERN/SLAC 3081/E. Processing elements and memory boards are connected by a 'circular' switchnet. The hardware and software architecture of APE, as well as its implementation are discussed in this paper. Some physics results obtained in the simulation of lattice gauge theories are also presented.

Original language	English (US)
Pages (from-to)	345-353
Number of pages	9
Journal	Computer Physics Communications
Volume	45
Issue number	1-3
DOIs	https://doi.org/10.1016/0010-4655(87)90172-X
State	Published - Aug 1 1987

Publisher link

10.1016/0010-4655(87)90172-X

Find It

Find It at U of M Libraries

Cite this

Albanese, M., Bacilieri, P., Cabasino, S., Cabibbo, N., Costantini, F., Fiorentini, G., Flore, F., Fonti, A., Fucci, A., Lombardo, M. P., Galeotti, S., Giacomelli, P., Marchesini, P., Marinari, E., Marzano, F., Miotto, A., Paolucci, P., Parisi, G., Pascoli, D., ... Tripiccione, R. (1987). The APE computer: An array processor optimized for lattice gauge theory simulations. Computer Physics Communications, 45(1-3), 345-353. https://doi.org/10.1016/0010-4655(87)90172-X

Albanese, M, Bacilieri, P, Cabasino, S, Cabibbo, N, Costantini, F, Fiorentini, G, Flore, F, Fonti, A, Fucci, A, Lombardo, MP, Galeotti, S, Giacomelli, P, Marchesini, P, Marinari, E, Marzano, F, Miotto, A, Paolucci, P, Parisi, G, Pascoli, D, Passuello, D, Petrarca, S, Rapuano, F, Remiddi, E, Rusack, R, Salina, G & Tripiccione, R 1987, 'The APE computer: An array processor optimized for lattice gauge theory simulations', Computer Physics Communications, vol. 45, no. 1-3, pp. 345-353. https://doi.org/10.1016/0010-4655(87)90172-X

@article{81280f3ab8354eb0a6eaa622752e34a5,

title = "The APE computer: An array processor optimized for lattice gauge theory simulations",

abstract = "The APE computer is a high performance processor designed to provide massive computational power for intrinsically parallel and homogeneous applications. APE is a linear array of processing elements and memory boards that execute in parallel in SIMD mode under the control of a CERN/SLAC 3081/E. Processing elements and memory boards are connected by a 'circular' switchnet. The hardware and software architecture of APE, as well as its implementation are discussed in this paper. Some physics results obtained in the simulation of lattice gauge theories are also presented.",

author = "M. Albanese and P. Bacilieri and S. Cabasino and N. Cabibbo and F. Costantini and G. Fiorentini and F. Flore and A. Fonti and A. Fucci and Lombardo, {M. P.} and S. Galeotti and P. Giacomelli and P. Marchesini and E. Marinari and F. Marzano and A. Miotto and P. Paolucci and G. Parisi and D. Pascoli and D. Passuello and S. Petrarca and F. Rapuano and E. Remiddi and R. Rusack and G. Salina and R. Tripiccione",

year = "1987",

month = aug,

day = "1",

doi = "10.1016/0010-4655(87)90172-X",

language = "English (US)",

volume = "45",

pages = "345--353",

journal = "Computer Physics Communications",

issn = "0010-4655",

publisher = "Elsevier B.V.",

number = "1-3",

}

TY - JOUR

T1 - The APE computer

T2 - An array processor optimized for lattice gauge theory simulations

AU - Albanese, M.

AU - Bacilieri, P.

AU - Cabasino, S.

AU - Cabibbo, N.

AU - Costantini, F.

AU - Fiorentini, G.

AU - Flore, F.

AU - Fonti, A.

AU - Fucci, A.

AU - Lombardo, M. P.

AU - Galeotti, S.

AU - Giacomelli, P.

AU - Marchesini, P.

AU - Marinari, E.

AU - Marzano, F.

AU - Miotto, A.

AU - Paolucci, P.

AU - Parisi, G.

AU - Pascoli, D.

AU - Passuello, D.

AU - Petrarca, S.

AU - Rapuano, F.

AU - Remiddi, E.

AU - Rusack, R.

AU - Salina, G.

AU - Tripiccione, R.

PY - 1987/8/1

Y1 - 1987/8/1

N2 - The APE computer is a high performance processor designed to provide massive computational power for intrinsically parallel and homogeneous applications. APE is a linear array of processing elements and memory boards that execute in parallel in SIMD mode under the control of a CERN/SLAC 3081/E. Processing elements and memory boards are connected by a 'circular' switchnet. The hardware and software architecture of APE, as well as its implementation are discussed in this paper. Some physics results obtained in the simulation of lattice gauge theories are also presented.

AB - The APE computer is a high performance processor designed to provide massive computational power for intrinsically parallel and homogeneous applications. APE is a linear array of processing elements and memory boards that execute in parallel in SIMD mode under the control of a CERN/SLAC 3081/E. Processing elements and memory boards are connected by a 'circular' switchnet. The hardware and software architecture of APE, as well as its implementation are discussed in this paper. Some physics results obtained in the simulation of lattice gauge theories are also presented.

UR - http://www.scopus.com/inward/record.url?scp=45949117296&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=45949117296&partnerID=8YFLogxK

U2 - 10.1016/0010-4655(87)90172-X

DO - 10.1016/0010-4655(87)90172-X

M3 - Article

AN - SCOPUS:45949117296

SN - 0010-4655

VL - 45

SP - 345

EP - 353

JO - Computer Physics Communications

JF - Computer Physics Communications

IS - 1-3

ER -

The APE computer: An array processor optimized for lattice gauge theory simulations

Abstract

Publisher link

Find It

Other files and links

Fingerprint

Cite this