TY - GEN
T1 - TFT-LCD application specific low power SRAM using charge-recycling technique
AU - Kim, Kee Jong
AU - Kim, Chris H.
AU - Roy, Kaushik
PY - 2005/12/1
Y1 - 2005/12/1
N2 - We propose a novel low power charge-recycling SRAM (CR-SRAM) for portable TFT-LCD applications. In portable TFT-LCD applications, low power considerations are becoming more important for longer battery lifetime. To reduce the power consumption in SRAMs, the source-line, connected to the source terminals of the driver MOSFETs, is controlled, so that it is zero in the active mode and has a positive bias voltage in the stand-by mode. However, the overhead power consumed during the control of source-line voltage is considerable due to the large capacitive load on the source-line. Applying a charge-recycling technique to the source-line allows reduction of the power dissipation of the source-biased SRAM. Moreover, by exploiting the sequential access pattern of the TFT-LCD memory, the proposed CR-SRAM can efficiently reduce the power dissipation of the control circuit for charge recycling. The proposed CR-SRAM is implemented in a 0.18 /spl mu/m technology and shows 68% and 14% power reduction compared to conventional SRAM (CON-SRAM) and source-biased SRAM (SB-SRAM), respectively. We also evaluate the power consumptions under various temperatures and row driver clock frequencies. Experimental results show that the percentage of power savings due to charge recycling increases with the higher frequency and achieved a maximum of 25% at 250 MHz.
AB - We propose a novel low power charge-recycling SRAM (CR-SRAM) for portable TFT-LCD applications. In portable TFT-LCD applications, low power considerations are becoming more important for longer battery lifetime. To reduce the power consumption in SRAMs, the source-line, connected to the source terminals of the driver MOSFETs, is controlled, so that it is zero in the active mode and has a positive bias voltage in the stand-by mode. However, the overhead power consumed during the control of source-line voltage is considerable due to the large capacitive load on the source-line. Applying a charge-recycling technique to the source-line allows reduction of the power dissipation of the source-biased SRAM. Moreover, by exploiting the sequential access pattern of the TFT-LCD memory, the proposed CR-SRAM can efficiently reduce the power dissipation of the control circuit for charge recycling. The proposed CR-SRAM is implemented in a 0.18 /spl mu/m technology and shows 68% and 14% power reduction compared to conventional SRAM (CON-SRAM) and source-biased SRAM (SB-SRAM), respectively. We also evaluate the power consumptions under various temperatures and row driver clock frequencies. Experimental results show that the percentage of power savings due to charge recycling increases with the higher frequency and achieved a maximum of 25% at 250 MHz.
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U2 - 10.1109/ISQED.2005.121
DO - 10.1109/ISQED.2005.121
M3 - Conference contribution
AN - SCOPUS:37849040880
SN - 0769523013
SN - 9780769523019
T3 - Proceedings - International Symposium on Quality Electronic Design, ISQED
SP - 59
EP - 64
BT - Proceedings - 6th International Symposium on Quality Electronic Design, ISQED 2005
T2 - 6th International Symposium on Quality Electronic Design, ISQED 2005
Y2 - 21 March 2005 through 23 March 2005
ER -