TY - JOUR
T1 - Technology mapping for domino logic
AU - Zhao, Min
AU - Sapatnekar, Sachin S.
PY - 1998
Y1 - 1998
N2 - Domino logic is a popular configuration for implementing high-speed circuits. An algorithm for domino logic mapping, under a parameterized library style, is presented here. Practical design methods, such as the use of multioutput domino and wide domino gates, are incorporated within the technology mapping framework. The technique can handle large circuits with small computational overheads, and shows improvements of up to about 37% over existing methods.
AB - Domino logic is a popular configuration for implementing high-speed circuits. An algorithm for domino logic mapping, under a parameterized library style, is presented here. Practical design methods, such as the use of multioutput domino and wide domino gates, are incorporated within the technology mapping framework. The technique can handle large circuits with small computational overheads, and shows improvements of up to about 37% over existing methods.
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U2 - 10.1145/288548.288621
DO - 10.1145/288548.288621
M3 - Conference article
AN - SCOPUS:0032314734
SN - 1092-3152
SP - 248
EP - 251
JO - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
JF - IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers
T2 - Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, ICCAD
Y2 - 8 November 1998 through 12 November 1998
ER -