TY - JOUR
T1 - System-level design for test of fully differential analog circuits
AU - Vinnakota, Bapiraju
AU - Harjani, Ramesh
AU - Stessman, Nicholas J.
PY - 1995
Y1 - 1995
N2 - Analog IC test occupies a significant fraction of the design cycle. Testing costs are increased by the twin requirements of high precision and accuracy in signal measurement. We discuss a system level ACOB technique for fully differential analog ICs. Our test techniques incorporate analog specific constraints such as device matching, and circuit and switching noise. They have a minimal impact on performance, area and power. The techniques can be used for both discrete and continuous time circuits, over a wide frequency range. The system level DFT scheme is also used to design a self-testing switched capacitor filter. Our checking scheme provides significant fault coverage and is demonstrably superior to other DFT techniques for differential circuits.
AB - Analog IC test occupies a significant fraction of the design cycle. Testing costs are increased by the twin requirements of high precision and accuracy in signal measurement. We discuss a system level ACOB technique for fully differential analog ICs. Our test techniques incorporate analog specific constraints such as device matching, and circuit and switching noise. They have a minimal impact on performance, area and power. The techniques can be used for both discrete and continuous time circuits, over a wide frequency range. The system level DFT scheme is also used to design a self-testing switched capacitor filter. Our checking scheme provides significant fault coverage and is demonstrably superior to other DFT techniques for differential circuits.
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U2 - 10.1145/217474.217569
DO - 10.1145/217474.217569
M3 - Conference article
AN - SCOPUS:0029224587
SN - 0738-100X
SP - 450
EP - 454
JO - Proceedings - Design Automation Conference
JF - Proceedings - Design Automation Conference
T2 - Proceedings of the 32nd Design Automation Conference
Y2 - 12 June 1995 through 16 June 1995
ER -