TY - GEN
T1 - Synthesizing a representative critical path for post-silicon delay prediction
AU - Liu, Qunzeng
AU - Sapatnekar, Sachin S
PY - 2009/9/21
Y1 - 2009/9/21
N2 - Several approaches to post-silicon adaptation require feedback from a replica of the nominal critical path, whose variations are intended to reflect those of the entire circuit after manufacturing. For realistic circuits, where the number of critical paths can be large, the notion of using a single critical path is too simplistic. This paper overcomes this problem by introducing the idea of synthesizing a representative critical path (RCP), which captures these complexities of the variations. We first prove that the requirement on the RCP is that it should be highly correlated with the circuit delay. Next, we present two novel algorithms to automatically build the RCP. Our experimental results demonstrate that over a number of samples of manufactured circuits, the delay of the RCP captures the worst case delay of the manufactured circuit. The average prediction error of all circuits is shown to be below 2.8% for both approaches. For both our approach and the critical path replica method, it is essential to guard-band the prediction to ensure pessimism: our approach requires a guard band 30% smaller than for the critical path replica method.
AB - Several approaches to post-silicon adaptation require feedback from a replica of the nominal critical path, whose variations are intended to reflect those of the entire circuit after manufacturing. For realistic circuits, where the number of critical paths can be large, the notion of using a single critical path is too simplistic. This paper overcomes this problem by introducing the idea of synthesizing a representative critical path (RCP), which captures these complexities of the variations. We first prove that the requirement on the RCP is that it should be highly correlated with the circuit delay. Next, we present two novel algorithms to automatically build the RCP. Our experimental results demonstrate that over a number of samples of manufactured circuits, the delay of the RCP captures the worst case delay of the manufactured circuit. The average prediction error of all circuits is shown to be below 2.8% for both approaches. For both our approach and the critical path replica method, it is essential to guard-band the prediction to ensure pessimism: our approach requires a guard band 30% smaller than for the critical path replica method.
KW - Post-silicon optimization
KW - Representative critical path
UR - http://www.scopus.com/inward/record.url?scp=70349089251&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=70349089251&partnerID=8YFLogxK
U2 - 10.1145/1514932.1514973
DO - 10.1145/1514932.1514973
M3 - Conference contribution
AN - SCOPUS:70349089251
SN - 9781605584492
T3 - Proceedings of the International Symposium on Physical Design
SP - 183
EP - 190
BT - Proceedings of the 2009 International Symposium on Physical Design, ISPD'09
T2 - 2009 International Symposium on Physical Design, ISPD'09
Y2 - 29 March 2009 through 1 April 2009
ER -