Abstract
Dynamically tagged directories are memory-efficient mechanisms for maintaining cache coherence in shared-memory multiprocessors. These directories use special-purpose caches of pointers that are subject to two types of overflow: 1) pointer overflow, which limits the maximum sharing of a memory block, and 2) set overflow, which forces the premature invalidation of cached blocks. We propose a superassociative tagged directory that can preserve some of the cached copies of a memory block when a set overflows by allowing multiple address tags in the same set to contain the same address value. Verilog descriptions are used to estimate its implementation cost and timing delay, and a multiprocessor cache simulator is used to evaluate its performance.
| Original language | English (US) |
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| Pages | 42-45 |
| Number of pages | 4 |
| State | Published - Dec 1 1994 |
| Event | Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors - Cambridge, MA, USA Duration: Oct 10 1994 → Oct 12 1994 |
Other
| Other | Proceedings of the IEEE International Conference on Computer Design: VLSI in Computers and Processors |
|---|---|
| City | Cambridge, MA, USA |
| Period | 10/10/94 → 10/12/94 |