@inproceedings{ef291e58a8b641fdb1626b9154eb707b,
title = "Subthreshold leakage modeling and estimation of general CMOS complex gates",
abstract = "A new subthreshold leakage model is proposed in order to improve the static power estimation in general CMOS complex gates. Series-parallel transistor arrangements with more than two logic depth, as well as non-seriesparallel off-switch networks are covered by such analytical modeling. The occurrence of on-switches in off-networks, also ignored by previous works, is considered in the proposed analysis. The model has been validated through electrical simulations, taking into account transistor sizing, operating temperature, supply voltage and threshold voltage variations.",
author = "Butzen, {Paulo F.} and Reis, {Andr{\'e} I.} and Kim, {Chris H.} and Ribas, {Renato P.}",
year = "2007",
doi = "10.1007/978-3-540-74442-9_46",
language = "English (US)",
isbn = "9783540744412",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer Verlag",
pages = "474--484",
booktitle = "Integrated Circuit and System Design",
note = "17th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2007 ; Conference date: 03-09-2007 Through 05-09-2007",
}