Abstract
The presence of process variations makes it imperative to depart from the traditional corner-based methodology and migrate to statistical design techniques. In this chapter, based on a set of variational models that capture correlated as well as uncorrelated variations, we present techniques for presilicon statistical timing and power analysis to determine the performance spread over a population of manufactured parts. In order to improve this spread, we discuss presilicon statistical optimization techniques that incorporate appropriate margins to enable improved manufacturing yield. At the post-silicon stage, we then present how a set of compact sensors may be used to predict the delay of a manufactured part, with known confidence, through a small set of measurements on the sensors: such data can then be used to drive adaptive post-silicon tuning approaches that are individualized to each manufactured part.
| Original language | English (US) |
|---|---|
| Title of host publication | Low-Power Variation-Tolerant Design in Nanometer Silicon |
| Publisher | Springer US |
| Pages | 109-149 |
| Number of pages | 41 |
| ISBN (Print) | 9781441974174 |
| DOIs | |
| State | Published - 2011 |