SrSnO3Field-Effect Transistors with Recessed Gate Electrodes

V. R. Saran Kumar Chaganti, Tristan K. Truttmann, Fengdeng Liu, Bharat Jalan, Steven J. Koester

Research output: Contribution to journalArticle

Abstract

Fabrication of gate-recessed SrSnO3 (SSO) metal-semiconductor field-effect transistors (MESFETs) with Ni Schottky gates is reported on bi-layer epitaxial SSO films with a thin heavily-doped cap layer. Devices with 0.5-μm gate length showed enhancement-mode behavior with a saturation drain current, IDSAT , of 33 mA/mm and peak transconductance, gm,max , of 65 mS/mm. The gm,max value is a roughly × improvement over control devices fabricated on single-layer films. Gate-recessed SSO MESFETs with Pt Schottky gates were also explored on the bi-layer films. Devices with 1-μm gate length displayed IDSAT =133 mA/mm and gm,max =73 mS/mm, after thermal annealing.

Original languageEnglish (US)
Article number9145756
Pages (from-to)1428-1431
Number of pages4
JournalIEEE Electron Device Letters
Volume41
Issue number9
DOIs
StatePublished - Sep 2020

Keywords

  • gate recess
  • MESFET
  • perovskites
  • stannate

How much support was provided by MRSEC?

  • Partial

Reporting period for MRSEC

  • Period 1

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  • Projects

    University of Minnesota MRSEC (DMR-2011401)

    Lodge, T. P.

    9/1/208/31/26

    Project: Research project

    University of Minnesota MRSEC (DMR-2011401)

    Lodge, T. P.

    9/1/208/31/26

    Project: Research project

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