TY - GEN
T1 - SRAM leakage suppression by minimizing standby supply voltage
AU - Qin, Huifang
AU - Cao, Yu
AU - Markovic, Dejan
AU - Vladimirescu, Andrei
AU - Rabaey, Jan
PY - 2004
Y1 - 2004
N2 - Suppressing the leakage current in memories is critical in low-power design. By reducing the standby supply voltage (VDD) to its limit, which is the Data Retention Voltage (DRV), leakage power can be substantially reduced. This paper explores how low DRV can be in a standard low leakage SRAM module and analyzes how DRV is affected by parameters such as process variations, chip temperature, and transistor sizing. An analytical model for DRV as a function of process and design parameters is presented, and forms the base for further design space explorations. This model is verified using simulations as well as measurements from a 4KB SRAM chip in a 0.13μm technology. It is demonstrated that an SRAM cell state can be preserved at sub-300mV standby VDD, with more than 90% leakage power savings.
AB - Suppressing the leakage current in memories is critical in low-power design. By reducing the standby supply voltage (VDD) to its limit, which is the Data Retention Voltage (DRV), leakage power can be substantially reduced. This paper explores how low DRV can be in a standard low leakage SRAM module and analyzes how DRV is affected by parameters such as process variations, chip temperature, and transistor sizing. An analytical model for DRV as a function of process and design parameters is presented, and forms the base for further design space explorations. This model is verified using simulations as well as measurements from a 4KB SRAM chip in a 0.13μm technology. It is demonstrated that an SRAM cell state can be preserved at sub-300mV standby VDD, with more than 90% leakage power savings.
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U2 - 10.1109/isqed.2004.1283650
DO - 10.1109/isqed.2004.1283650
M3 - Conference contribution
AN - SCOPUS:2942687683
SN - 0769520936
SN - 9780769520933
T3 - Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004
SP - 55
EP - 60
BT - Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004
PB - IEEE Computer Society
T2 - Proceedings - 5th International Symposium on Quality Electronic Design, ISQED 2004
Y2 - 22 March 2004 through 24 March 2004
ER -