Many important application domains, including machine learning, feature intrinsically noise tolerant algorithms. These algorithms process massive, yet noisy and redundant data, by probabilistic and often iterative techniques. As a result, there is a range of valid outputs rather than a single golden value. While this may translate into relaxed constraints for testing and verification of approximate systems, distinguishing actual design bugs from what is being approximated also becomes harder. In this paper, using representative case studies, we pose several challenges for the test and verification community as approximate computing becomes more prevalent as a design of choice in order to achieve performance gains, power or energy savings, improved reliability or reduced software and/or hardware complexity.
|Original language||English (US)|
|Title of host publication||2019 IEEE 37th VLSI Test Symposium, VTS 2019|
|Publisher||IEEE Computer Society|
|State||Published - Apr 2019|
|Event||37th IEEE VLSI Test Symposium, VTS 2019 - Monterey, United States|
Duration: Apr 23 2019 → Apr 25 2019
|Name||Proceedings of the IEEE VLSI Test Symposium|
|Conference||37th IEEE VLSI Test Symposium, VTS 2019|
|Period||4/23/19 → 4/25/19|
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© 2019 IEEE.