Software canaries: Software-based path delay fault testing for variation-aware energy-efficient design

John Sartori, Rakesh Kumar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations

Abstract

Software-based path delay fault testing (SPDFT) has been used to identify faulty chips that cannot meet timing constraints due to gross delay defects. In this paper, we propose using SPDFT for a new purpose - aggressively selecting the operating point of a variation-affected design. In order to use SPDFT for this purpose, test routines must provide high coverage of potentially-critical paths and must have low dynamic performance overhead. We describe how to apply SPDFT for selecting an energy-efficient operating point for a variation-affected processor and demonstrate that our test routines achieve ample coverage and low overhead.

Original languageEnglish (US)
Title of host publicationISLPED 2014 - Proceedings of the 2014 International Symposium on Low Power Electronics and Design
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages159-164
Number of pages6
ISBN (Print)9781450329750
DOIs
StatePublished - 2014
Event2014 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2014 - San Diego, CA, United States
Duration: Aug 11 2014Aug 13 2014

Publication series

NameProceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)1533-4678

Conference

Conference2014 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2014
CountryUnited States
CitySan Diego, CA
Period8/11/148/13/14

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