Using a new technique in forming the cubic single-crystal silicon nanoparticles that are about 40 nm on a side, the authors have demonstrated a vertical-flow surround-gate Schottky-barrier transistor. This approach allows the use of well-known approaches to surface passivation and contact formation within the context of deposited single-crystal materials for device applications. It opens the door to the novel three-dimensional integrated circuits and new approaches to hyper integration. The fabrication process involves successive deposition and planarization and does not require nonoptical lithography. Device characteristics show reasonable turn-off characteristics and on-current densities of more than 10 7 A/ cm 2.
Bibliographical noteFunding Information:
Manuscript received October 13, 2005; revised July 10, 2006. This work was supported by the NSF through the NIRT grant DMI-0304211. The work that was done at the Minnesota Nanofabrication Center and at the Characterization Center was supported in part by the National Science Foundation through the NNIN program. The review of this paper was arranged by Editor R. Shrivastava.
- Schottky-barrier transistor