Simulation-based design of programmable systolic arrays

R. Smith, G. Sobelman

Research output: Contribution to journalArticlepeer-review

4 Scopus citations


The paper describes how a simulator is used interactively to design programmable systolic arrays for use in signal-processing applications. A preliminary architecture is defined, with the algorithms targeted for implementation as the starting point. Hardware resources such as maths chips, controllers and memory are then selected. These hardware resources impose constraints on the design. The goal is then that of implementing the desired architecture using the selected hardware. A simulator is described that is used to model and examine architectural and algorithmic options. Via this analysis of the architecture and algorithms, the design can be optimized for a set of applications. The use of the simulator in an actual design is discussed.

Original languageEnglish (US)
Pages (from-to)669-675
Number of pages7
JournalComputer-Aided Design
Issue number10
StatePublished - Dec 1991


  • algorithms
  • electronics design
  • signal processing
  • simulation
  • systolic arrays


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