Silicon odometer: An on-chip reliability monitor for measuring frequency degradation of digital circuits

Tae Hyoung Kim, Randy Persaud, Chris H. Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

34 Scopus citations

Abstract

A fully-digital reliability monitor is presented for high resolution frequency degradation measurements of digital circuits. The proposed scheme measures the beat frequency of two ring oscillators, one which is stressed and the other which is unstressed, to achieve 50X higher delay sensing resolution compared to prior techniques. A reliability monitor test chip has been fabricated in a 1.2V, 130nm CMOS technology.

Original languageEnglish (US)
Title of host publication2007 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers
Pages122-123
Number of pages2
DOIs
StatePublished - Dec 1 2007
Event2007 Symposium on VLSI Circuits, VLSIC - Kyoto, Japan
Duration: Jun 14 2007Jun 16 2007

Publication series

NameIEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other2007 Symposium on VLSI Circuits, VLSIC
Country/TerritoryJapan
CityKyoto
Period6/14/076/16/07

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