Selective epitaxial growth of silicon layer using batch-type equipment for vertical diode application for next generation memories

Kong Soo Lee, Dae Han Yoo, Young Sub Yoo, Jae Jong Han, Seok Sik Kim, Hong Sik Jeong, Chang Jin Kang, Joo Tae Moon, Hyunho Park, Hanwook Jeong, Kwang Ryul Kim, Byoungdeog Choi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Vertical diodes for cross-point phase change memory were realized by selective epitaxial growth (SEG) technique using cyclic chemical vapor deposition method. H2/SiH4/Cl2 cyclic CVD system was introduced in batch-type vertical furnace equipement, replacing conventional single-wafer H2/dichlorosilane/HCl CVD system. It provided excellent capacity of 40 wafers per batch. Selectivity loss which is one of the most crucial features in SEG process for diode application was controlled with both the amount of SiH4 and Cl2 and the period of gas supply, and practical value of selectivity loss was confirmed to be less than 100 in 200-mm wafers. Structural and electrical properties of pn diodes were investigated, and cyclic SEG silicon diode showed more eligible electrical ability to current flow than that of poly-si in terms of forward current and ideality factor as well as lower reverse leakage current.

Original languageEnglish (US)
Title of host publicationAdvanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 6
Subtitle of host publicationNew Materials, Processes, and Equipment
Pages281-286
Number of pages6
Edition1
DOIs
StatePublished - Dec 30 2010
EventAdvanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS: New Materials, Processes and Equipment, 6 - 217th ECS Meeting - Vancouver, BC, Canada
Duration: Apr 26 2010Apr 27 2010

Publication series

NameECS Transactions
Number1
Volume28
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

OtherAdvanced Gate Stack, Source/Drain and Channel Engineering for Si-based CMOS: New Materials, Processes and Equipment, 6 - 217th ECS Meeting
CountryCanada
CityVancouver, BC
Period4/26/104/27/10

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    Lee, K. S., Yoo, D. H., Yoo, Y. S., Han, J. J., Kim, S. S., Jeong, H. S., Kang, C. J., Moon, J. T., Park, H., Jeong, H., Kim, K. R., & Choi, B. (2010). Selective epitaxial growth of silicon layer using batch-type equipment for vertical diode application for next generation memories. In Advanced Gate Stack, Source/Drain, and Channel Engineering for Si-Based CMOS 6: New Materials, Processes, and Equipment (1 ed., pp. 281-286). (ECS Transactions; Vol. 28, No. 1). https://doi.org/10.1149/1.3375613