Secure and Reliable XOR Arbiter PUF Design: An Experimental Study based on 1 Trillion Challenge Response Pair Measurements

Research output: Chapter in Book/Report/Conference proceedingConference contribution

30 Scopus citations

Abstract

This paper shows that performing an XOR operation between the outputs of parallel arbiter PUFs generates a more secure output at the expense of reduced stability. In this work, we evaluate the security and stability of XOR PUFs using 1,000,000 randomly chosen challenges, applied to 10 custom-designed PUF chips, tested for 100,000 cycles per challenge, under different voltage and temperature conditions. Based on extensive hardware data, we propose a practical method for selecting challenges that will produce stable responses. A linear regression approach based on soft responses collected during enrollment phase was used to build accurate models for each individual arbiter PUF. Hardware data from fabricated chips verify that the approach is highly effective.

Original languageEnglish (US)
Title of host publicationProceedings of the 54th Annual Design Automation Conference 2017, DAC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781450349277
DOIs
StatePublished - Jun 18 2017
Event54th Annual Design Automation Conference, DAC 2017 - Austin, United States
Duration: Jun 18 2017Jun 22 2017

Publication series

NameProceedings - Design Automation Conference
VolumePart 128280
ISSN (Print)0738-100X

Other

Other54th Annual Design Automation Conference, DAC 2017
Country/TerritoryUnited States
CityAustin
Period6/18/176/22/17

Bibliographical note

Funding Information:
This research was supported in part by the National Science Foundation under grant number CNS-1441639 and the Semiconductor Research Corporation under contract number 2014- TS-2560.

Publisher Copyright:
© 2017 ACM.

Keywords

  • VDD and temperature variation
  • XOR PUF
  • challenge selection
  • modeling attack
  • response stability
  • silicon data

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