SAC (systolic array controller) is a chip designed for use with an NCR 16-bit fixed-point multiplier/accumulator (MAC) chip to form a two-chip cell in systolic arrays for signal processing applications. The SAC/MAC cell can be used as an inexpensive, flexible building block for either one-dimensional or two-dimensional systolic arrays in either application-specific or general-purpose machines. The SAC provides an interface to other cells via four parallel ports. It routes data to and from the companion high-speed MAC via one 16-bit bidirectional port, controls the MAC, and provides 64 words of scratchpad memory for programs and data.
|Original language||English (US)|
|Number of pages||4|
|Journal||ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings|
|State||Published - Jan 1 1988|