Abstract
A wide variety of error tolerant applications supports the use of approximate circuits that achieve power savings by introducing small errors. This paper proposes a fast and novel algorithm for the design of such circuits with the goal of maximizing power savings, constrained by a fixed error budget, through an analytical expression to optimally select the number of bits to be approximated. This algorithm outperforms uniform approximation schemes by over 30% in power savings, with negligible computational overhead.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9781450349277 |
| DOIs | |
| State | Published - Jun 18 2017 |
| Event | 54th Annual Design Automation Conference, DAC 2017 - Austin, United States Duration: Jun 18 2017 → Jun 22 2017 |
Publication series
| Name | Proceedings - Design Automation Conference |
|---|---|
| Volume | Part 128280 |
| ISSN (Print) | 0738-100X |
Other
| Other | 54th Annual Design Automation Conference, DAC 2017 |
|---|---|
| Country/Territory | United States |
| City | Austin |
| Period | 6/18/17 → 6/22/17 |
Bibliographical note
Publisher Copyright:© 2017 ACM.
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