Keyphrases
Energy Efficient
100%
Intra-cell
100%
Design Methodology
100%
Functional Yield
100%
Upsizing
100%
Ultra-low Voltage
100%
Standard Cell Design
100%
Voltage Standard
100%
Transistor
50%
Proposed Design
50%
Subthreshold
50%
Cell Area
50%
Supply Voltage
50%
Area Overhead
50%
Minimum Energy
50%
Benchmark Circuits
50%
Energy Efficiency Improvement
50%
LMS Method
50%
Logic Gates
50%
65nm CMOS
50%
Low Threshold Voltage
50%
Area Constraint
50%
Suboptimal Methods
50%
Robustness Enhancement
50%
Yield Constraints
50%
Leakage Minimization
50%
Computer Science
Energy Efficient
100%
Benchmark Circuit
100%
Power Supply Voltage
100%
Area Constraint
100%
Logic Gate
100%
Energy Efficiency
100%
Threshold Voltage
100%
Engineering
Cell Design
100%
Power Supply
50%
Area Overhead
50%
Logic Gate
50%
Cell Area
50%
Energy Efficiency
50%
Supply Voltage
50%