RELIABLE DESIGN OF PARALLEL PROCESSOR SYSTEMS.

R. B. Shu, H. C. Du

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A simple and efficient approach is proposed to improve the reliability and availability of SIMD (single instruction, multiple data stream) parallel processor systems (PPSs) with N equals 2**n PEs (processing elements), interconnected by multistage interconnection networks or crossbar networks. This approach requires slight modifications of the system. A particular running fashion, called the dual running fashion, is provided, in which the whole PPS can be viewed as two duplicated PPSs with half the processors (PEs) in each PPS. The modified PPS can still operate with half the original processors for up to n faulty processors in the system. An efficient self-diagnosis method to detect all faulty PEs is given. The dual running fashion can also be used to provide a redundant configuration for certain computations that require high accuracy.

Original languageEnglish (US)
Title of host publicationProceedings of the International Conference on Parallel Processing
EditorsSartaj K. Sahni
PublisherPennsylvania State Univ Press
Pages882-884
Number of pages3
ISBN (Print)0271006080
StatePublished - Dec 1 1987
EventProc Int Conf Parallel Process 1987 - Universal Park, PA, USA
Duration: Aug 17 1987Aug 21 1987

Publication series

NameProceedings of the International Conference on Parallel Processing
ISSN (Print)0190-3918

Other

OtherProc Int Conf Parallel Process 1987
CityUniversal Park, PA, USA
Period8/17/878/21/87

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