Register allocation for design of data format converters

Keshab K. Parhi, Joo Sang Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

The authors use life time analysis and propose systematic register allocation techniques to reuse the registers; register reuse leads to data format converter architectures with fewer registers. A simple forward-circulate allocation scheme is proposed to motivate the use of register allocation, and a more efficient forward-backward register allocation scheme is proposed. Examples of data converters presented include matrix transposer, serial-to-parallel, and parallel-to-serial converters. General m-to-n bit-parallel and bit-serial converters are also studied. It is shown that register allocation techniques can lead to up to 50% savings in hardware area, as compared with converter architectures designed in a straightforward manner.

Original languageEnglish (US)
Title of host publicationProceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing
Editors Anon
PublisherPubl by IEEE
Pages1133-1136
Number of pages4
ISBN (Print)078030033
StatePublished - Dec 1 1991
EventProceedings of the 1991 International Conference on Acoustics, Speech, and Signal Processing - ICASSP 91 - Toronto, Ont, Can
Duration: May 14 1991May 17 1991

Publication series

NameProceedings - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing
Volume2
ISSN (Print)0736-7791

Other

OtherProceedings of the 1991 International Conference on Acoustics, Speech, and Signal Processing - ICASSP 91
CityToronto, Ont, Can
Period5/14/915/17/91

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