Description of a multiprocessing system using conventional microprocessors which are dynamically restructured to get the desired word width and dynamically reconfigured to obtain the desired memory height. The system is space shared so that several tasks concurrently execute in different blocks of the partitioned resources, and communication is provided between and within task blocks. The dynamic reconfiguration and restructuring of the different processors and memory modules and interprocessor and I/O communications are achieved using an interconnection network called an SW-banyan, the cost of which is proportional to n Ln n, where n is the number of modules to be interconnected. A great deal of flexibility and power is available by means of an inexpensive SW-banyan switching network.
|Original language||English (US)|
|Number of pages||10|
|State||Published - Jan 1 2017|
|Event||Proc of the Int Conf on Parallel Process - Bellaire, Mich|
Duration: Aug 23 1977 → Aug 26 1977
|Other||Proc of the Int Conf on Parallel Process|
|Period||8/23/77 → 8/26/77|