Real-time selective harmonic minimization using hybrid analog/digital computing

Jason Poon, Mohit Sinha, Sairaj V. Dhople, Juan Rivas-Davila

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a hybrid analog/digital computing circuit that solves a form of the selective harmonic minimization problem in a fast and scalable manner. Voltages in the circuit represent variables in the optimization problem, and, in steady state, converge to the optimal solution of the problem. A digital microcontroller sets voltages at particular nodes in the circuit as to program the cost function and other inputs to the optimization. We present a specific realization of the computing circuit that solves for eight independent switching angles for a quarter-wave symmetric PWM driven two-level single-phase inverter. This realization minimizes seven undesired harmonics while also maintaining control of the modulation index. The simulation results demonstrate that the proposed circuit can converge to the optimal solution in less than 5.0 ms. Our survey of prior methods indicates that this is substantially faster than existing published methods in the literature.

Original languageEnglish (US)
Title of host publication2021 IEEE Applied Power Electronics Conference and Exposition, APEC 2021
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages1041-1046
Number of pages6
ISBN (Electronic)9781728189499
DOIs
StatePublished - Jun 14 2021
Event36th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2021 - Virtual, Online, United States
Duration: Jun 14 2021Jun 17 2021

Publication series

Name2021 IEEE Applied Power Electronics Conference and Exposition (APEC)

Conference

Conference36th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2021
Country/TerritoryUnited States
CityVirtual, Online
Period6/14/216/17/21

Bibliographical note

Publisher Copyright:
© 2021 IEEE.

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