Real-time Selective Harmonic Minimization Using a Hybrid Analog/Digital Computing Method

Jason Poon, Mohit Sinha, Sairaj V. Dhople, Juan Rivas-Davila

Research output: Contribution to journalArticlepeer-review

6 Scopus citations

Abstract

We present a hybrid analog/digital computing circuit to solve a selective harmonic minimization problem. The approach leverages favorable attributes of digital and analog controllers to yield a fast and scalable optimization solver. A digital microcontroller programs the cost function and other user-defined inputs to the optimization problem. Voltages in the circuit represent switching angles. In steady state, the voltages converge to Karush-Kuhn-Tucker (KKT) points of the problem. We present a specific realization of the computing circuit that solves for eight independent switching angles for a quarter-wave symmetric pulsewidth modulation (PWM) driven two-level single-phase inverter. Seven undesired harmonics are minimized while retaining control over the modulation index. The proposed computing circuit is verified with simulations and a hardware implementation. The experimental results demonstrate that the proposed circuit can converge to the optimal solution in less than 5.0 ms, which is substantially faster than the existing methods and facilitates real-time implementation. Moreover, the steady-state power consumption of the hardware implementation is approximately 750 mW, which is also significantly lower than the published methods for comparable applications. The computing circuit is utilized to generate the PWM for a 2-kW single-phase inverter, which validates its feasibility in practical applications.

Original languageEnglish (US)
Pages (from-to)5078-5088
Number of pages11
JournalIEEE Transactions on Power Electronics
Volume37
Issue number5
DOIs
StatePublished - May 1 2022

Bibliographical note

Publisher Copyright:
© 1986-2012 IEEE.

Keywords

  • Analog computers
  • dc-ac power converters
  • optimization methods
  • power conversion harmonics
  • selective harmonic minimization

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