Program optimization for concurrent multithreaded architectures

Jenn Yuan Tsai, Zhenzhen Jiang, Pen-Chung Yew

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Scopus citations


This paper presents some compiler and program transformation techniques for concurrent multithreaded architectures, in particular the superthreaded architecture [9], which adopts a thread pipelining execution model that allows threads with data dependences and control dependences to be executed in parallel. In this paper, we identify several important program analysis and transformation techniques that allow the superthreaded architecture to exploit more parallelism in programs with less run-time overhead. We evaluate the performance of the superthreaded architecture and the effectiveness of the program transformation techniques by manually compiling several benchmark programs and running them through a trace-driven, cycle-by-cycle superthreaded processor simulator. The simulation results show that a superthreaded processor can achieve promising speedups for most of the benchmark programs with the proposed program transformation techniques applied.

Original languageEnglish (US)
Title of host publicationLanguages and Compilers for Parallel Computing - 10th International Workshop, LCPC 1997, Proceedings
EditorsPen-Chung Yew, Chua-Huang Huang, P. Sadayappan, Zhiyuan Li, Siddharta Chatterjee, David Sehr
PublisherSpringer Verlag
Number of pages17
ISBN (Print)3540644725, 9783540644729
StatePublished - 1998
Event10th Annual International Workshop on Languages and Compilers for Parallel Computing, LCPC 1997 - Minneapolis, United States
Duration: Aug 7 1997Aug 9 1997

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Other10th Annual International Workshop on Languages and Compilers for Parallel Computing, LCPC 1997
Country/TerritoryUnited States


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