Power optimization of high performance ΔΣ modulators for portable measurement applications

In this paper, power optimization of two high performance ΔΣ modulators for portable measurement applications is presented. One modulator is a single-loop single-bit topology which achieves an 89.8dB peak SNDR and consumes 20μW with a 1.5V supply. Here, a new power efficient current mirror Class-AB OTA is introduced to reduce the power. The other modulator adopts both multi-bit technique and switched-opamp (SO) technique to realize the ultra-low power target. Its total power consumption is only 9μW at a 1.8V supply, and the peak SNDR reaches 80.5dB. Especially, a new fully-clocked SO is proposed in this modulator to achieve a 50% power saving and double Figure-of-Merit (FOM) over the traditional type. Besides, to realize a zero-optimization coefficient of 1/100 and improve the performance, a novel resonator idea applicable to SO technique is adopted with 75% power and 70% area reduction. Both modulators are fabricated in a low cost 0.35μm CMOS process with a bandwidth of 1 kHz. The measured results show high FOM of the designed modulators.