Power optimization of CMOS LC VCOs

M. T. Hsieh, J. Harvey, Ramesh Harjani

Research output: Contribution to journalArticlepeer-review


A technique is presented for the minimization of power consumption in a LC tank voltage-controlled oscillator for low-power wireless systems, such as wireless sensors. This technique involves finding the power constraints for a given inductor design, and then making an optimal tradeoff between inductor series resistance and stray capacitance. The technique and the analytic model are then used to optimize the power consumption of an LC oscillator. The oscillator performance is verified via simulation. The simulated performance matches the predicted performance well. Optimized designs using this technique can result in 100% or more reduction of power in comparison to sub-optimal design.

Original languageEnglish (US)
JournalMaterials Research Society Symposium - Proceedings
StatePublished - Jan 1 2001


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