Power optimization of CMOS LC VCOs

Ming Ta Hsieh, Jackson Harvey, Ramesh Harjani

Research output: Chapter in Book/Report/Conference proceedingConference contribution


A technique is presented for the minimization of power consumption in a LC tank voltage-controlled oscillator for low-power wireless systems, such as wireless sensors. This technique involves finding the power constraints for a given inductor design, and then making an optimal tradeoff between inductor series resistance and stray capacitance. The technique and the analytic model are then used to optimize the power consumption of an LC oscillator. The oscillator performance is verified via simulation. The simulated performance matches the predicted performance well. Optimized designs using this technique can result in 100% or more reduction of power in comparison to sub-optimal design.

Original languageEnglish (US)
Title of host publicationISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings
Number of pages4
StatePublished - Dec 1 2001
Event2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001 - Sydney, NSW, Australia
Duration: May 6 2001May 9 2001


Other2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001
CitySydney, NSW


Dive into the research topics of 'Power optimization of CMOS LC VCOs'. Together they form a unique fingerprint.

Cite this