Power Estimation of Digital Data Paths Using HEAT

Janardhan H. Satyanarayana, Keshab K. Parhi

Research output: Contribution to journalArticle

4 Scopus citations

Abstract

The Hierarchical Energy Analysis Tool lets designers quickly estimate power consumption of various data-path architectures, enabling a power consumption comparison at a high level before the layout design is carried out.

Original languageEnglish (US)
Pages (from-to)101-110
Number of pages10
JournalIEEE Design and Test of Computers
Volume17
Issue number2
DOIs
StatePublished - Apr 1 2000

    Fingerprint

Cite this