Placement and routing in 3D integrated circuits

Cristinel Ababei; Yan Feng; Brent Goplen; Hushrav Mogal; Tianpei Zhang; Kia Bazargan; Sachin Sapatnekar

doi:10.1109/MDT.2005.150

Placement and routing in 3D integrated circuits

Cristinel Ababei
, Yan Feng
, Brent Goplen
, Hushrav Mogal
, Tianpei Zhang
, Kia Bazargan
, Sachin Sapatnekar

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

129 Scopus citations

Abstract

Advanced manufacturing and packaging techniques are permitting a glimpse at the near-future, where wires can go in three dimensions, and ICs made in diverse processes can be assembled together - sandwich like - to achieve ever higher levels of integration. This article focuses on a specific CAD problem in connection with 3D ICs: how to partition, place, and wire a design subject to various constraints on power, timing, and manufacturability.

Original language	English (US)
Pages (from-to)	520-531
Number of pages	12
Journal	IEEE Design and Test of Computers
Volume	22
Issue number	6
DOIs	https://doi.org/10.1109/MDT.2005.150
State	Published - Nov 2005

Bibliographical note

Funding Information:
This research was supported in part by DARPA

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 9 Industry, Innovation, and Infrastructure

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10.1109/MDT.2005.150

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abstract = "Advanced manufacturing and packaging techniques are permitting a glimpse at the near-future, where wires can go in three dimensions, and ICs made in diverse processes can be assembled together - sandwich like - to achieve ever higher levels of integration. This article focuses on a specific CAD problem in connection with 3D ICs: how to partition, place, and wire a design subject to various constraints on power, timing, and manufacturability.",

author = "Cristinel Ababei and Yan Feng and Brent Goplen and Hushrav Mogal and Tianpei Zhang and Kia Bazargan and Sachin Sapatnekar",

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AU - Goplen, Brent

AU - Mogal, Hushrav

AU - Zhang, Tianpei

AU - Bazargan, Kia

AU - Sapatnekar, Sachin

N1 - Funding Information: This research was supported in part by DARPA

PY - 2005/11

Y1 - 2005/11

N2 - Advanced manufacturing and packaging techniques are permitting a glimpse at the near-future, where wires can go in three dimensions, and ICs made in diverse processes can be assembled together - sandwich like - to achieve ever higher levels of integration. This article focuses on a specific CAD problem in connection with 3D ICs: how to partition, place, and wire a design subject to various constraints on power, timing, and manufacturability.

AB - Advanced manufacturing and packaging techniques are permitting a glimpse at the near-future, where wires can go in three dimensions, and ICs made in diverse processes can be assembled together - sandwich like - to achieve ever higher levels of integration. This article focuses on a specific CAD problem in connection with 3D ICs: how to partition, place, and wire a design subject to various constraints on power, timing, and manufacturability.

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ER -

Placement and routing in 3D integrated circuits

Abstract

Bibliographical note

UN SDGs

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