Pipelined adaptive differential vector quantizer for low-power speech coding applications

Naresh R. Shanbhag, Keshab K Parhi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A fine-grain pipelined adaptive differential vector quantizer architecture is proposed for low-power speech coding applications. The pipelined architecture is developed by employing the relaxed look-ahead technique. The hardware overhead due to pipelining is only the pipelining latches. Simulations with speech sampled at 8 Khz show that, for a vector dimension of 8, the degradation in the signal-to-noise ratio (SNR) due to pipelining is negligible. Furthermore, this degradation is independent of the level of pipelining. Thus, the proposed architecture is attractive from an integrated circuit implementation point of view.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
PublisherPubl by IEEE
Pages1956-1958
Number of pages3
Volume3
ISBN (Print)0780312813
StatePublished - Jan 1 1993
EventProceedings of the 1993 IEEE International Symposium on Circuits and Systems - Chicago, IL, USA
Duration: May 3 1993May 6 1993

Other

OtherProceedings of the 1993 IEEE International Symposium on Circuits and Systems
CityChicago, IL, USA
Period5/3/935/6/93

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